Gallium Nitride (GaN) transistors are gaining popularity in industrial and automotive applications due to their ability to achieve high power density and higher efficiency. However, their reliability and robustness still pose limitations to their widespread adoption. Short-Circuit (SC) robustness has been widely studied in literature by means of experimental characterizations. However, less attention has been drawn to the simulation of GaN HEMTs operating in SC conditions due to the absence of accurate models that can fully describe the main phenomena impacting the SC behavior of a GaN device, such as drain current collapse and gate-leakage current increasing. In this context, this work proposes a behavioral model for the drain and gate current of a 650-V/60-A GaN HEMT, that is integrated into the manufacturer model of the device in the LTSpice simulation environment. The proposed model shows a valuable accuracy improvement in determining drain and gate currents during the SC of a GaN half-bridge, as demonstrated by comparing simulations and experimental tests performed on a hardware prototype in different operating conditions. It is also demonstrated that the model can be applied to other 650 V GaN HEMTs, becoming a reliable instrument to simulate the device and to design an effective SC protection circuit.
Enhanced Behavioral Modeling for Short-Circuit Ruggedness Analysis in GaN-based Half-Bridge
Palazzo, Simone;Busatto, Giovanni;
2025-01-01
Abstract
Gallium Nitride (GaN) transistors are gaining popularity in industrial and automotive applications due to their ability to achieve high power density and higher efficiency. However, their reliability and robustness still pose limitations to their widespread adoption. Short-Circuit (SC) robustness has been widely studied in literature by means of experimental characterizations. However, less attention has been drawn to the simulation of GaN HEMTs operating in SC conditions due to the absence of accurate models that can fully describe the main phenomena impacting the SC behavior of a GaN device, such as drain current collapse and gate-leakage current increasing. In this context, this work proposes a behavioral model for the drain and gate current of a 650-V/60-A GaN HEMT, that is integrated into the manufacturer model of the device in the LTSpice simulation environment. The proposed model shows a valuable accuracy improvement in determining drain and gate currents during the SC of a GaN half-bridge, as demonstrated by comparing simulations and experimental tests performed on a hardware prototype in different operating conditions. It is also demonstrated that the model can be applied to other 650 V GaN HEMTs, becoming a reliable instrument to simulate the device and to design an effective SC protection circuit.| File | Dimensione | Formato | |
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