Pulsewidth modulated voltage source inverter can be easily controlled in such a way as to achieve the desired value of the output voltage and/or current, but they exhibit high switching losses when operated at high switching frequencies. Besides, relevant electromagnetic interferences can be produced because of the high di/dt and dv/dt in the converter waveforms. These problems can be partially or totally eliminated if the converter switches are commutated at zero voltage and or zero current. This is achieved by means of suitable tuned LC resonant circuits. In this paper, a novel topology of quasi-resonant dc link for soft switching of VSI is proposed. It is based on two resonant circuits: a main one, which makes the voltage oscillating around the main dc bus voltage, and which is commutated at zero current, and an auxiliary circuit which is enabled to drive the dc voltage to zero just when an inverter switch commutation occurs. Dead time imposition is fully taken into account. A detailed experiment investigation has been performed for validating the proposed scheme.
A NEW QUASI-RESONANT DC LINK TOPOLOGY FOR SOFT SWITCHING OF VOLTAGE-SOURCE INVERTER
ATTAIANESE, Ciro;TOMASSO, Giuseppe
2003-01-01
Abstract
Pulsewidth modulated voltage source inverter can be easily controlled in such a way as to achieve the desired value of the output voltage and/or current, but they exhibit high switching losses when operated at high switching frequencies. Besides, relevant electromagnetic interferences can be produced because of the high di/dt and dv/dt in the converter waveforms. These problems can be partially or totally eliminated if the converter switches are commutated at zero voltage and or zero current. This is achieved by means of suitable tuned LC resonant circuits. In this paper, a novel topology of quasi-resonant dc link for soft switching of VSI is proposed. It is based on two resonant circuits: a main one, which makes the voltage oscillating around the main dc bus voltage, and which is commutated at zero current, and an auxiliary circuit which is enabled to drive the dc voltage to zero just when an inverter switch commutation occurs. Dead time imposition is fully taken into account. A detailed experiment investigation has been performed for validating the proposed scheme.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
