The paper considers a simple observer exploiting the high computational power of the FPGA. It aims to improve the speed estimation behavior and to make a step towards a SOPC PMSM drive sensor-less control.
Gate-Level Simulation of an FPGA-Based PMSM Drive Sensorless Control
DI STEFANO, Roberto;MARIGNETTI, Fabrizio;SCARANO, Maurizio
2007-01-01
Abstract
The paper considers a simple observer exploiting the high computational power of the FPGA. It aims to improve the speed estimation behavior and to make a step towards a SOPC PMSM drive sensor-less control.File in questo prodotto:
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